Technical Field
The disclosed technology relates to electronic systems, and more particularly, to electronic systems that generate clock signals.
Description of the Related Technology
Clock generation circuits can be implemented in communication systems to provide multiple clock signals for an electronic system. One or more phase locked loops (PLLs) are typically used to recover a noisy reference clock signal, also referred to as a reference signal, and to create stable, low jitter signals. PLLs can be used in, for example, frequency synthesizers, telecommunications systems, chip-to-chip communication systems, the like, or any combination thereof.
Clock generation circuits frequently include a PLL to lock an output clock signal generated by the PLL's voltage controlled oscillator to the phase of an incoming reference clock signal. For instance, a high precision tunable voltage controlled oscillator can be phase-locked to a noisy reference clock signal, and the PLL can operate to suppress phase noise and to attenuate jitter. Clock generation circuits can provide multiple low jitter clock signals derived from a selection of noisy reference clocks in an integrated circuit.